(a) Technical Field
The present invention relates to a method for manufacturing indium (In)-antimony (Sb)-tellurium (Te) nanowires and a phase-change memory device comprising the nanowires.
(b) Background Art
Semiconductor memories are classified into two groups: dynamic random access memory (DRAM) and non-volatile random access memory (NVRAM). The DRAM, while having a large market, consumes much power because the information stored therein is volatile so that the same information should be stored again in a very short interval. Accordingly, NVRAM devices, which are characterized by low cost while having a storage density comparable to that of DRAM and an operating speed comparable to that of static random access memory (SRAM), have received a great deal of attention as next-generation memories. Among these NVRAM devices, phase-change memory (also termed “Ovonic Unified Memory” (OUM), “Phase-Change RAM” (PRAM) or “Chalcogenide RAM” (CRAM)) is formed of a chalcogenide material which shows the electrical and optical switching between amorphous and crystalline states, and it records, erases and reproduces information by the difference in electrical resistance between the two states. The phase-change memory exhibits very excellent properties such as a fast operating speed and a high level of integration, has a simple device structure and is manufactured by a simple process, and thus it has an advantage in that it is easy to achieve cost effectiveness while having high information storage and processing capacities.
As a material for phase-change memory devices, Ge2Sb2Te5 (GST) is being widely studied. The GST has a crystallization temperature (about 130° C.), which is much lower than the decomposition temperatures of precursors which are used when the GST is deposited, particularly on a trench structure, and thus if the GST is deposited on a portion of a trench, it will be rapidly crystallized to close the trench. Accordingly, the GST has a problem in that it is difficult to reproducibly fill the trench structure. Accordingly, there is a need for a material that can substitute the GST material.
In—Sb—Te (IST) exhibits the properties of phase-change memory in various compositions, including In3SbTe2. The IST is expected as a phase-change memory material capable of substituting for the GST material, because it has a crystallization temperature of 290° C. or higher, a high melting point (about 626° C.) and a low reset current. Accordingly, there have been studies on top-down photolithographic processes which comprise depositing a phase-change material on a planar structure by a sputtering method to form a thin film, etching the thin film to form a device, and evaluating the properties of the device.
In order to manufacture a PRAM having faster switching properties and requiring low power consumption, it is necessary to reduce the size of a GST cell. However, when the GST cell size is 100 nm or less, due to material damage during a photolithographic process, a set resistance value becomes larger, a sensing region becomes smaller, and reading speed also becomes slower. As an alternative to solve the problems of the top-down process, a method of manufacturing a memory device by depositing a phase-change material on a previously formed trench structure using a method such as sputtering is attracting a great deal of attention. However, in the case of the sputtering method, it is difficult to deposit the phase-change material on a trench structure having a size of 300-400 nm or smaller, and even if the trench structure is filled with the phase-change material, pores occur in the remaining portion of the trench structure. For this reason, the use of the sputtering method to manufacture a small device having a size of 200 nm or smaller is limited.
A chemical deposition method provides excellent step coverage and easily achieve large-area deposition, and thus it is expected to be suitable for the mass production of small-sized devices.
Moreover, nanowires which have recently been actively studied are important materials fabricated by a bottom-up method, and they can significantly increase the density of memory devices. Thus, the results of studies on phase-change memories employing GST nanowires have been reported. GT or GST nanowires of diameter of about 30-150 nm have a very small number of defects, and thus need low reset current and store data for a long period of time, compared to PRAM devices manufactured by existing photolithographic processes. However, a phase-change memory employing IST nanowires has not yet been studied. In addition, because GST nanowires are fabricated by a vapor-liquid-solid method in which the growth of GST nanowires is induced by evaporating GeTe(GT) and Sb2Te3(ST) powders and supplying the evaporated materials to a substrate having an Au catalyst, they require a high-temperature process. Accordingly, a method capable of fabricating nanowires made of such phase-change materials at low temperature is necessarily required.
The above and other features and advantages of the present invention will be apparent from or are set forth in more detail in the accompanying drawings, which are incorporated in and form a part of this specification, and the following Detailed Description, which together serve to explain by way of example the principles of the present invention.